Polar Antenna Impedance Detection and Tuning for Efficiency Improvement in a 3G/4G CMOS Power AmplifierMohammad Shadab HussainEnrollment No:16101033Branch: ECEIIIT-Naya [email protected] GuptaEnrollment No:16101022Branch: ECEIIIT- Naya [email protected]—One of the main goals of power related amplifier designs is to improve the efficiency and longitivity of battery life. Therefore both peak efficiency and impedance matching are very important processes in designing issues. In particular, the impedance matching of antennas is becoming more and more challenging. High or increased frequency band and smaller antenna size and user proximity effect also adds to antenna impedance mismatching. It is difficult to tune the antenna impedance in its vector form to its optimal value accurately to detect the time varying mismatch. Introduction Now, considering the previous mention issued, antenna impedance tuning is one of key deigning issues. The existing methods detect only scalar magnitude or phase with costly and bulky components such as bi directional couplers. Therefore it is difficult to tune the antenna impedance in its vector form to its optimal value accurately to detect the time varying mismatch. To solve this problem, we propose an antenna impedance-tuning loop with detection circuits, which is implemented on a CMOS-PA chip, to track the antenna impedance. A low-loss impedance tuner is realized with an SOI switch, benefiting from the recent advance in SOI technology. Therefore entire tunning loop is implemented on a complete cost-effective Si platform. For low output power, the loop controls the tuner impedance automatically to the optimal value.Impedance Detection And TuningThe fig.3.1.1 explains the concept of proposed impedance and tuning. The goal is to detect the impedance seen from the PA(Zpa) with respect to the reference impedance(Zrff) by analyzing the difference in the voltage of X and Y. The result does not depend on the input power, and the PVT variations can be hugely reduced. The attenuation ratio and phase offset are previously determined and the output comparator and phase comparator are both set to zero if Zpa is optimal. If Zpa deviates from optimal value the output and phase comparator represents the magnitude and phase of Zpa. The Smith chart plot is-The control loop thus automatically increases the impedance observed from the PA (ZPA), such that the voltage swing at the PA output (Vx) is constant. Consequently, the tuned impedance is inversely proportional to the PA current (Vx = iPA x ZPA), satisfying load-line theory and resulting in optimum impedance for reduced gate width. For an ideal case the peak drain efficiency is independent of the gate width and is kept to the maximum value.BLOCK DIAGRAMIn fig. 3.1.2 represents the block diagram. The PA, reference amplifier and driver amplifier are differential amplifiers. An envelope OTA and phase detector realize the comparisons of phase and amplitude whose output are quantized in three levels, which indicate whether the magnitude and phase are too large, to small or on the target. The controller is runned in FPGA. DIFFRENTIAL VOLTAGE DETECTORIt is important for reducing large substrate noise. Fig. 3.1.3 explains further about detector. Voltage is detected via capacitive coupling between the detector coil and antenna coil. Because of high magnetic coupling with output transformer, current due to the magnetic coupling between the detector coil and transformer is almost zero. Hence the voltages at A and A` is enhanced by using the series inductance and parallel inductance. The third order harmonic is rejected due to the filtering effects of the output transformer. Acknowledgment We are very thankful to Dr. Ramesh Vaddi, Assistant Professor, ECE, IIIT-NR, and the teaching assistant, Mr. Aditya Japa, for their immense support and help towards achieving the results of our project. REFRENCES1 K. Boyle, et al., Analysis of Mobile Phone Antenna Impedance Variations with User Proximity, IEEE Trans. Antennas and Propagation, pp. 364-372, Feb. 2007. 2 H. Song, et al., A CMOS Adaptive Antenna-Impedance-Tuning IC Operating in the 850MHz-to-2GHz band, ISSCC Dig. Tech Papers, pp. 384-385, Feb. 2009. 3 A. Bezooijen, et al., A GSM/EDGE/WCDMA Adaptive Series-LC Matching Network Using RF-MEMS Switches, IEEE J. Solid-State Circuits, pp. 2259- 2268, Oct 2008. 4http://www.semicon.toshiba.co.jp/eng/product/rf/rf_sw/index.html